The present invention provides a nonvolatile semiconductor memory that comprises one-transistor cells and yet is able to read information from a selected memory cell without mistake. The memory comprise switch elements (3A,3B,3C,3D) which are arrayed in rows and columns, each of the switch element having a drain and a source, and a control electrode, first lines each (48) of which includes a main line (48H) and subsidiary lines (48A,48B) diverging from the main line, each of the subsidiary lines connecting to the drain of one of the switch elements (3A,3B) arrayed in a row, second lines each (44) of which includes a main line (44H) and subsidiary lines (44A,44C) diverging from the main line, each of the subsidiary lines connecting to the source of one of the switch elements (3A,3C) arrayed in a column, word lines each (52) of which connects to all of the control electrodes of the switch elements (3A,3C) arrayed in a column, and a diode (27 ) interposed either in the subsidiary line connecting to the drain of each of the switch elements or in the subsidiary line connecting to the source of the same switch element.