发明授权
US5455519A Josephson logic circuit 失效
约瑟夫森逻辑电路

  • 专利标题: Josephson logic circuit
  • 专利标题(中): 约瑟夫森逻辑电路
  • 申请号: US28075
    申请日: 1987-03-20
  • 公开(公告)号: US5455519A
    公开(公告)日: 1995-10-03
  • 发明人: Tatsuya Ohori
  • 申请人: Tatsuya Ohori
  • 申请人地址: JPX Kawasaki
  • 专利权人: Fujitsu Limited
  • 当前专利权人: Fujitsu Limited
  • 当前专利权人地址: JPX Kawasaki
  • 优先权: JPX57-092802 19820531; JPX57-229707 19821228
  • 主分类号: H03K19/195
  • IPC分类号: H03K19/195
Josephson logic circuit
摘要:
A Josephson logic circuit includes a Josephson element inserted between an input terminal and a reference electric potential such as ground, a resistor inserted between the input terminal and an input of the next stage of the Josephson circuit, and a current source which supplies an offset current to the Josephson element. By adjusting the offset current, the Josephson logic circuit can be operated as an AND circuit, an OR circuit, or a majority logic circuit having a high input sensitivity.
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