公开(公告)号：US06380562B1

公开(公告)日：2002-04-30

申请号：US09477172

申请日：2000-01-04

申请人： Michiko Takei ,  Tatsuya Ohori ,  Hongyong Zhang ,  Satomi Nagasawa

发明人： Michiko Takei ,  Tatsuya Ohori ,  Hongyong Zhang ,  Satomi Nagasawa

IPC分类号： H01L29786

CPC分类号： G02F1/136209

摘要： A number of parallel light-interrupting stripes are formed over the entire TFT substrate, and light-interrupting patterns that are isolated from each other are formed separately from the light-interrupting stripes. Light interruption along gate bus patterns is effected by the light-interrupting stripes, while light interruption along data bus patterns is effected by elongating branches from the gate bus patterns. Light interruption between the tip of each branch and a polysilicon drain is effected by the isolated light-interrupting pattern.

摘要翻译： 在整个TFT基板上形成多个平行的光中断条纹，并且彼此隔离的光中断图案与光中断条纹分开形成。 沿着栅极总线模式的光中断是通过光中断条纹实现的，而沿着数据总线模式的光中断通过从栅极总线图案延伸分支来实现。 每个分支的尖端与多晶硅漏极之间的光中断通过隔离的光中断模式来实现。

公开(公告)号：US5985701A

公开(公告)日：1999-11-16

申请号：US851219

申请日：1997-05-05

申请人： Michiko Takei ,  Tatsuya Ohori ,  Hongyong Zhang ,  Hideki Uochi

发明人： Michiko Takei ,  Tatsuya Ohori ,  Hongyong Zhang ,  Hideki Uochi

IPC分类号： G02F1/1343 ,  G02F1/136 ,  G02F1/1368 ,  H01L21/316 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/786 ,  H01L21/8238

CPC分类号： H01L29/78621 ,  H01L27/1214 ,  H01L29/66757

摘要： A process reduced in mask steps for use in the fabrication of a thin film transistor having an LDD structure, comprising anodically oxidizing a gate electrode of a thin film transistor and performing ion implantation using the thus formed anodic oxide film as the mask. Also claimed is a similar process for fabricating a p-channel transistor and an n-channel transistor on a single substrate, comprising performing ion implantation of an impurity of the first conductive type to both of the transistor regions by using the anodic oxide film as a mask, and then performing ion implantation of an impurity of the second conductive type while masking one of the transistor regions with a resist.

摘要翻译： 一种降低掩模步骤的方法，用于制造具有LDD结构的薄膜晶体管，其包括用薄膜晶体管的栅电极进行阳极氧化，并使用由此形成的阳极氧化膜作为掩模进行离子注入。 还要求保护的是在单个衬底上制造p沟道晶体管和n沟道晶体管的类似工艺，包括通过使用阳极氧化膜作为第一导电类型的杂质作为第一导电类型的杂质 掩模，然后进行第二导电类型的杂质的离子注入，同时用抗蚀剂掩蔽晶体管区域之一。

公开(公告)号：US5844260A

公开(公告)日：1998-12-01

申请号：US937785

申请日：1997-09-24

申请人： Tatsuya Ohori

发明人： Tatsuya Ohori

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/338 ,  H01L29/778 ,  H01L29/812 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072

CPC分类号： H01L29/7783

摘要： A compound semiconductor device constructed on a heteroepitaxial substrate includes a silicon substrate, a first compound semiconductor layer of a first compound semiconductor material provided on the silicon substrate as a buffer layer, a second compound semiconductor layer of a second compound semiconductor material having a lattice constant larger than that of the first compound semiconductor layer, and an active device provided on the second compound semiconductor layer, wherein the second compound semiconductor layer has a thickness exceeding a critical thickness above which dislocations develop due to the misfit in the lattice constant between the first and second compound semiconductor layers.

摘要翻译： 构造在异质外延基板上的复合半导体器件包括硅衬底，设置在作为缓冲层的硅衬底上的第一化合物半导体材料的第一化合物半导体层，具有晶格常数的第二化合物半导体材料的第二化合物半导体层 大于第一化合物半导体层的有效元件，以及设置在第二化合物半导体层上的有源器件，其中第二化合物半导体层的厚度超过临界厚度，在该临界厚度之上，由于第一化合物半导体层之间的晶格常数的失配， 和第二化合物半导体层。

公开(公告)号：US08277893B2

公开(公告)日：2012-10-02

申请号：US12497428

申请日：2009-07-02

申请人： Tatsuya Ohori ,  Kazushige Shiina ,  Yasushi Iyechika ,  Noboru Suda ,  Yukichi Takamatsu ,  Yoshiyasu Ishihama ,  Takeo Yoneyama ,  Yoshinao Komiya

发明人： Tatsuya Ohori ,  Kazushige Shiina ,  Yasushi Iyechika ,  Noboru Suda ,  Yukichi Takamatsu ,  Yoshiyasu Ishihama ,  Takeo Yoneyama ,  Yoshinao Komiya

IPC分类号： C23C16/06

CPC分类号： C23C16/4581 ,  C23C16/481

摘要： A chemical vapor deposition apparatus which comprises a susceptor for mounting a substrate thereon, a heater for heating the substrate, a feed gas introduction portion and a reaction gas exhaust portion, wherein a light transmitting ceramics plate held or reinforced by means of a supporting member is equipped between the heater and a mounting position of the substrate. A chemical vapor deposition apparatus that is capable of forming film stably for a long time without giving a negative influence on a quality of semiconductor film even in a case of chemical vapor deposition reaction employing a furiously corrosive gas with an elevated temperature for producing a gallium nitride compound semiconductor or so was realized.

摘要翻译： 一种化学气相沉积设备，包括用于在其上安装基板的基座，用于加热基板的加热器，进料气体引入部分和反应气体排出部分，其中通过支撑构件保持或增强的透光陶瓷板是 设置在加热器和基板的安装位置之间。 能够长时间稳定地形成膜而不会对半导体膜的质量产生负面影响的化学气相沉积装置，即使在使用具有高温腐蚀性气体的化学气相沉积反应的情况下，用于制造氮化镓 化合物半导体等。

公开(公告)号：US20070051316A1

公开(公告)日：2007-03-08

申请号：US11514927

申请日：2006-09-05

申请人： Tatsuya Ohori ,  Kazushige Shiina ,  Yasushi Iyechika ,  Noboru Suda ,  Yukichi Takamatsu ,  Yoshiyasu Ishihama ,  Takeo Yoneyama ,  Yoshinao Komiya

发明人： Tatsuya Ohori ,  Kazushige Shiina ,  Yasushi Iyechika ,  Noboru Suda ,  Yukichi Takamatsu ,  Yoshiyasu Ishihama ,  Takeo Yoneyama ,  Yoshinao Komiya

IPC分类号： C23C16/00

CPC分类号： C23C16/4581 ,  C23C16/481

摘要： A chemical vapor deposition apparatus which comprises a susceptor for mounting a substrate thereon, a heater for heating the substrate, a feed gas introduction portion and a reaction gas exhaust portion, wherein a light transmitting ceramics plate held or reinforced by means of a supporting member is equipped between the heater and a mounting position of the substrate. A chemical vapor deposition apparatus that is capable of forming film stably for a long time without giving a negative influence on a quality of semiconductor film even in a case of chemical vapor deposition reaction employing a furiously corrosive gas with an elevated temperature for producing a gallium nitride compound semiconductor or so was realized.

摘要翻译： 一种化学气相沉积设备，包括用于在其上安装基板的基座，用于加热基板的加热器，进料气体引入部分和反应气体排出部分，其中通过支撑构件保持或增强的透光陶瓷板是 设置在加热器和基板的安装位置之间。 能够长时间稳定地形成膜而不会对半导体膜的质量产生负面影响的化学气相沉积装置，即使在使用具有高温腐蚀性气体的化学气相沉积反应的情况下，用于制造氮化镓 化合物半导体等。

公开(公告)号：US5506433A

公开(公告)日：1996-04-09

申请号：US277022

申请日：1994-08-24

申请人： Tatsuya Ohori ,  Isamu Hanyu ,  Fumitoshi Sugimoto ,  Yoshihiro Arimoto

发明人： Tatsuya Ohori ,  Isamu Hanyu ,  Fumitoshi Sugimoto ,  Yoshihiro Arimoto

IPC分类号： H01L27/12 ,  H01L21/02 ,  H01L21/20 ,  H01L27/01 ,  H01L29/04

CPC分类号： H01L21/76256 ,  H01L21/2007 ,  Y10S148/135

摘要： A silicon-on-insulator (SOI) structure having a single crystal layer of a group III-V compound semiconductor material contacting a single crystal substrate of sapphire such that a principal surface of the single crystal layer establishes an intimate contact with a corresponding principal surface of the single crystal substrate and the single crystal layer, and the single crystal substrate are bonded with each other while elevating a temperature.

摘要翻译： 一种绝缘体上硅（SOI）结构，其具有接触蓝宝石单晶衬底的III-V族化合物半导体材料的单晶层，使得单晶层的主表面与相应的主表面紧密接触 的单晶衬底和单晶层，并且单晶衬底在升高温度的同时彼此接合。

公开(公告)号：US06198517B1

公开(公告)日：2001-03-06

申请号：US09323559

申请日：1999-06-01

申请人： Tatsuya Ohori ,  Michiko Takei ,  Hongyong Zhang ,  Hideomi Suzawa ,  Naoaki Yamaguchi

发明人： Tatsuya Ohori ,  Michiko Takei ,  Hongyong Zhang ,  Hideomi Suzawa ,  Naoaki Yamaguchi

IPC分类号： G02F1136

CPC分类号： G02F1/136209

摘要： An active type liquid crystal display device, comprising an electrode being formed by using a transparent electrically conductive film constituting a pixel electrode, which allows the black matrix to be set as the common potential. Also claimed is an active type liquid crystal display device of the same type as above, comprising an electrode being formed on the same layer as that of the source line, which allows the black matrix to be set as the common potential.

公开(公告)号：US6156662A

公开(公告)日：2000-12-05

申请号：US281128

申请日：1999-03-29

申请人： Tatsuya Ohori ,  Tamotsu Wada ,  Kohji Ohgata ,  Tatsuya Kakehi ,  Ken-ichi Yanai

发明人： Tatsuya Ohori ,  Tamotsu Wada ,  Kohji Ohgata ,  Tatsuya Kakehi ,  Ken-ichi Yanai

IPC分类号： G02F1/136 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L29/786 ,  H01L21/311

CPC分类号： G02F1/1362

摘要： A method of fabricating a liquid crystal display device includes the step of removing a porous anodic oxide film selectively with respect to a barrier-type anodic oxide film covering a gate electrode pattern of a thin-film transistor, wherein the step of removing the porous anodic oxide film is conducted after the step of disconnecting a bridging conductor pattern used for supplying electric current at the time of anodic oxidation process of the gate electrode.

摘要翻译： 一种制造液晶显示装置的方法包括相对于覆盖薄膜晶体管的栅电极图案的阻挡型阳极氧化膜选择性地去除多孔阳极氧化膜的步骤，其中除去多孔阳极 在栅电极的阳极氧化处理之后断开用于提供电流的桥接导体图案的步骤之后进行氧化膜。

公开(公告)号：US5929948A

公开(公告)日：1999-07-27

申请号：US808949

申请日：1997-02-19

申请人： Tatsuya Ohori ,  Michiko Takei ,  Hongyong Zhang ,  Hideomi Suzawa ,  Naoaki Yamaguchi

发明人： Tatsuya Ohori ,  Michiko Takei ,  Hongyong Zhang ,  Hideomi Suzawa ,  Naoaki Yamaguchi

IPC分类号： G02F1/1335 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/136 ,  G02F1/1333 ,  G02F1/1345

CPC分类号： G02F1/136209

摘要： An active matrix liquid crystal display comprising a common electrode (#217), connected to a conductive black matrix (#302 and #303) through a coupling electrode (#227), which allows the black matrix to be set at the common potential. The common electrode is formed on the same layer as that of the source lines and data lines. The pixel electrode (#228) and the coupling electrode (#227) are comprised of the same transparent electrically conductive material.

摘要翻译： 一种有源矩阵液晶显示器，包括通过耦合电极（＃227）连接到导电黑矩阵（＃302和＃303）的公共电极（＃217），其允许将黑矩阵设置在公共电位。 公共电极形成在与源极线和数据线的层相同的层上。 像素电极（＃228）和耦合电极（＃227）由相同的透明导电材料构成。

公开(公告)号：US5455519A

公开(公告)日：1995-10-03

申请号：US28075

申请日：1987-03-20

申请人： Tatsuya Ohori

发明人： Tatsuya Ohori

IPC分类号： H03K19/195

CPC分类号： H03K19/1956

摘要： A Josephson logic circuit includes a Josephson element inserted between an input terminal and a reference electric potential such as ground, a resistor inserted between the input terminal and an input of the next stage of the Josephson circuit, and a current source which supplies an offset current to the Josephson element. By adjusting the offset current, the Josephson logic circuit can be operated as an AND circuit, an OR circuit, or a majority logic circuit having a high input sensitivity.

摘要翻译： 约瑟夫森逻辑电路包括插入在输入端和诸如地之间的参考电位之间的约瑟夫逊元件，插入在输入端和约瑟夫森电路的下一级的输入之间的电阻器，以及提供偏移电流的电流源 到约瑟夫森元素。 通过调整偏移电流，约瑟夫森逻辑电路可以作为AND电路，OR电路或具有高输入灵敏度的多数逻辑电路来操作。