In a semiconductor device, an n.sup.+ polysilicon layer is formed on a substrate through a gateoxide layer. A p.sup.+ source or drain diffusion layer is formed on both sides of an impurity layer in the substrate. The silicon layer positions over an intermediate portion of a channel formation layer, and has an oxide layer on upper surface thereof. The silicon layers have their side portions a p.sup.+ type polysilicon layer to be a gate electrode together with the silicon layer. The gate electrode semiconductor layer is formed on the channel formation layer through the gate insulation layer in the manner that, in a portion contacting with the gate insulation layer, the nearer portions approaches to the impurity layers of the source and drain regions, the larger a work function increases.