发明授权
US5499376A High speed mask and logical combination operations for parallel
processor units
失效
并行处理器单元的高速掩码和逻辑组合操作
- 专利标题： High speed mask and logical combination operations for parallel processor units
- 专利标题（中）： 并行处理器单元的高速掩码和逻辑组合操作
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申请号： US163460申请日： 1993-12-06
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公开(公告)号： US5499376A公开(公告)日： 1996-03-12
- 发明人: Edward C. King , Alan G. Smith
- 申请人： Edward C. King , Alan G. Smith
- 申请人地址： CA Fremont
- 专利权人： CPU Technology, Inc.
- 当前专利权人： CPU Technology, Inc.
- 当前专利权人地址： CA Fremont
- 主分类号： G06F9/305
- IPC分类号： G06F9/305 ; G06F9/38 ; G06F13/00 ; G06F15/16
摘要：
A computer system having a plurality of parallel processor units with each processor unit having an output bus of n bits and an associated mask register is provided. The computer system comprises a bus unit, coupled to the output bus of each processor unit and each associated mask register, for masking the output bus bits with bits in the mask register of each processor unit and logically combining the resulting masked bits from each processor unit into an output bus of n bits in one computer operation.
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