发明授权
US5502400A Logically configurable impedance matching input terminators for VLSI
失效
用于VLSI的逻辑可配置阻抗匹配输入终端
- 专利标题: Logically configurable impedance matching input terminators for VLSI
- 专利标题(中): 用于VLSI的逻辑可配置阻抗匹配输入终端
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申请号: US196675申请日: 1994-02-15
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公开(公告)号: US5502400A公开(公告)日: 1996-03-26
- 发明人: Robert R. Livolsi , Robert J. Lynch , George A. Williams, II , Roy A. Wood
- 申请人: Robert R. Livolsi , Robert J. Lynch , George A. Williams, II , Roy A. Wood
- 申请人地址: NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: NY Armonk
- 主分类号: H03H11/28
- IPC分类号: H03H11/28
摘要:
Electrical characteristics of the inputs to VLSI semiconductor chips can be modified after the chips are fabricated and mounted into multichip modules (packages), at which time the required characteristics are known accurately. The changes are accomplished by incorporating special circuitry at the chip inputs during their design combined with the use of `boundary-scan` type circuitry that has recently been put in place for device testing. The circuitry allows the impedance characteristics of the chip's receiver to be modified to match that of the driving source and the wiring interconnections between the chip and source. The test circuitry is used to provide the logical signals to selectively switch the circuits to the proper configuration. This enables optimally designed interconnections between the input and output circuitry on the chips and thereby avoids the necessity for costly re-designs.
公开/授权文献
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