An SRAM cell includes a semiconductor substrate doped with a dopant of a first type, a highly doped region in the substrate implanted with a dopant of opposite type, a gate oxide layer on the substrate, a first conductive layer formed upon the gate oxide layer, a dielectric layer deposited over the first conductive layer, an opening in the gate oxide layer, the first conductive layer, and the dielectric layer, and a second conductive layer deposited upon the dielectric layer.