发明授权
- 专利标题： Data bus protocol for high speed chip to chip data transfer
- 专利标题（中）： 数据总线协议，用于高速芯片到芯片的数据传输
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申请号： US389612申请日： 1995-02-14
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公开(公告)号： US5551052A公开(公告)日： 1996-08-27
- 发明人: Eric S. Barnes , George L. Eldridge , Uoc Nguyen , Ajit Shah , Ronald E. Weir
- 申请人： Eric S. Barnes , George L. Eldridge , Uoc Nguyen , Ajit Shah , Ronald E. Weir
- 申请人地址： CT Stamford
- 专利权人： Xerox Corporation
- 当前专利权人： Xerox Corporation
- 当前专利权人地址： CT Stamford
- 主分类号： G06F13/362
- IPC分类号： G06F13/362 ; G06F9/46 ; G06F13/40 ; G06F13/42
摘要：
A protocol for communication through a bus controller to control data transfers between a host processing platform and the data bus of a bit map printer. This protocol is optimized for a data bus which connects a number of ASIC accelerator cards in addition to the printer, disk controller, bus controller and other typical system cards. The basic data transfer cycle transfers eight data words on the bus between ASIC's, I/O devices, printer and any other devices.
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