发明授权
- 专利标题: Charge domain bit-serial multiplying digital-analog converter
- 专利标题(中): 电荷域位串行倍增数字模拟转换器
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申请号: US457827申请日: 1995-06-01
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公开(公告)号: US5555200A公开(公告)日: 1996-09-10
- 发明人: Alice M. Chiang
- 申请人: Alice M. Chiang
- 申请人地址: MA Cambridge
- 专利权人: Massachusetts Institute of Technology
- 当前专利权人: Massachusetts Institute of Technology
- 当前专利权人地址: MA Cambridge
- 主分类号: H03H21/00
- IPC分类号: H03H21/00 ; G06J1/00
摘要:
A single chip adaptive filtering system including an FIR filter and circuitry for calculating updated weighting coefficients for use in associated multiplying digital-to-analog converters. The adaptive FIR filter performs the convolution of a delayed and sampled input sequence to produce a filter output. Thereafter, an error term is determined by calculating the difference between the filter output and a reference signal which corresponds to a predetermined anticipated output of the filter. The error term is then applied to a least mean square (LMS) estimation algorithm for computing updated weighting coefficients to be used by the adaptive FIR filter.
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