发明授权
- 专利标题: Phase-locked loop timing recovery circuit
- 专利标题(中): 锁相环定时恢复电路
-
申请号: US327184申请日: 1994-10-21
-
公开(公告)号: US5581585A公开(公告)日: 1996-12-03
- 发明人: Hiroshi Takatori , Daniel L. Ray , Kenneth G. Buttle , James W. Everitt
- 申请人: Hiroshi Takatori , Daniel L. Ray , Kenneth G. Buttle , James W. Everitt
- 申请人地址: CA Sacramento
- 专利权人: Level One Communications, Inc.
- 当前专利权人: Level One Communications, Inc.
- 当前专利权人地址: CA Sacramento
- 主分类号: H04L7/00
- IPC分类号: H04L7/00 ; H04L7/02 ; H04L7/033 ; H04L25/03 ; H03H7/30 ; H03D3/24
摘要:
A timing recovery apparatus for recovering the timing from sparse timing information in multi-level or partial response codes. The timing recovery apparatus includes a switch for sampling an incoming line code signal according to a selectable sample rate, a feed forward equalizer for filtering the sampled signal, a decision feedback equalizer for cancelling intersymbol interference in the filtered signal and for recovering the timing in the sampled signal. The timing recovery circuit creates a phase correction signal in response to a signal received from the feed forward equalizer and thereby control the sample rate of the sample switch so that the signal-to-noise ratio at the node before the decision is maximized. The voltage controlled crystal oscillator may be controlled within a certain frequency range by using a second phase detector which compares the phase of the signal controlling the sampling of the incoming line code with a reference clock.
公开/授权文献
- USD276942S Floss holder 公开/授权日:1984-12-25
信息查询