Invention Grant
- Patent Title: Method of making flash memory cell
- Patent Title (中): 闪存单元制作方法
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Application No.: US938727Application Date: 1992-09-01
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Publication No.: US5587332APublication Date: 1996-12-24
- Inventor: Kuang-Yeh Chang , Subhash R. Nariani , William J. Boardman
- Applicant: Kuang-Yeh Chang , Subhash R. Nariani , William J. Boardman
- Applicant Address: CA San Jose
- Assignee: VLSI Technology, Inc.
- Current Assignee: VLSI Technology, Inc.
- Current Assignee Address: CA San Jose
- Main IPC: H01L21/8247
- IPC: H01L21/8247 ; H01L27/105
Abstract:
The present invention relates to a flash EEPROM cell using polysilicon-to-polysilicon hot electron emission to erase the memory contents of the cell. Exemplary embodiments include a side gate, a control gate, a floating gate and source and drain regions. Appropriate biasing of these gates and source and drain regions controls the electron population of the floating gate. The memory cells may be of either the double polysilicon or triple polysilicon variety. Peripheral transistors are formed from a last formed polysilicon layer to avoid degrading the peripheral transistors.
Public/Granted literature
- US4704971A Pulverized-coal burner Public/Granted day:1987-11-10
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