发明授权
US5625602A NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines 失效
NAND型动态RAM具有耦合到多开位线的临时存储寄存器和读出放大器

NAND-type dynamic RAM having temporary storage register and sense
amplifier coupled to multi-open bit lines
摘要:
A sense amplifier is connected between memory cell arrays, a re-writing register is arranged in position adjacent to the sense amplifier, transfer gates are disposed between the sense amplifier and the memory cell arrays, transfer gates are provided between bit lines of the memory cell arrays and global bit lines, and a gate control circuit for controlling the transfer gates is provided. When readout data is written into the register, the node of the sense amplifier is electrically separated from the bit lines and global bit lines.
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