发明授权
- 专利标题： Semiconductor memory device incorporating a test mechanism
- 专利标题（中）： 包含测试机构的半导体存储器件
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申请号： US551484申请日： 1995-11-01
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公开(公告)号： US5642317A公开(公告)日： 1997-06-24
- 发明人: Kiyohiro Furutani
- 申请人： Kiyohiro Furutani
- 申请人地址： JPX Tokyo
- 专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX7-117074 19950516
- 主分类号： G11C29/38
- IPC分类号： G11C29/38 ; G11C7/00 ; G11C29/00
摘要：
To present a semiconductor memory device incorporating a test mechanism in order to test plural semiconductor memory devices by using a tester having a single data judging circuit. The drain electrode of an N type MOSFET (Q16) is connected to a power source potential (V.sub.CC) through a fuse element (F1) (route cut-off element), and the source electrode is connected to the drain electrode of an N type MOSFET (Q17), and the drain electrode of the N type MOSFET (Q16) is connected to the input of an inverter (G16), and is also connected to a resistance element (R1) connected to a grounding potential (V.sub.SS). Therefore, since the test mechanism is incorporated, parallel tests are conducted by the inexpensive tester having only one data judging circuit, and thereafter by judging the results of comparison individually by using the same tester, the qualification of the semiconductor memory device can be judged.
公开/授权文献
- US5048975A Convertible blanket bag 公开/授权日：1991-09-17
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