Invention Grant
- Patent Title: Method of forming a line of high density floating gate transistors
- Patent Title (中): 形成高密度浮栅晶体管的方法
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Application No.: US675993Application Date: 1996-07-09
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Publication No.: US5658814APublication Date: 1997-08-19
- Inventor: Roger R. Lee
- Applicant: Roger R. Lee
- Applicant Address: ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: ID Boise
- Main IPC: H01L21/8247
- IPC: H01L21/8247 ; H01L27/115 ; H01L21/265
Abstract:
A method of forming a line for floating gate transistors is described and which includes, providing a substrate having a plurality of discrete field oxide regions, and intervening active area regions therebetween; forming a first alternating series of floating gates over a first alternating series of active area regions; forming a second alternating series of floating gates over a second alternating series of active area regions, the second series of floating gates disposed in spaced, overlapping and partial covering relation relative to the first alternating series of floating gates; forming a layer of dielectric material over the first and second series of floating gates; and forming a control gate layer of electrically conductive material over the layer of dielectric material. The present invention further relates to a memory chip, and die having a line of floating gate transistors formed from the same method.
Public/Granted literature
- US5518811A Pressure-sensitive adhesive tape and a process for producing same Public/Granted day:1996-05-21
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