发明授权
- 专利标题: Method of making asymmetrical N-channel and P-channel devices
- 专利标题(中): 制造不对称N沟道和P沟道器件的方法
-
申请号: US711381申请日: 1996-09-03
-
公开(公告)号: US5677224A公开(公告)日: 1997-10-14
- 发明人: Daniel Kadosh , Mark I. Gardner
- 申请人: Daniel Kadosh , Mark I. Gardner
- 申请人地址: CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: CA Sunnyvale
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L27/092 ; H01L21/70
摘要:
An asymmetrical N-channel IGFET and an asymmetrical P-channel IGFET are disclosed. One or both IGFETs include a lightly doped drain region, heavily doped source and drain regions, and an ultra-heavily doped source region. Preferably, the heavily doped source region and lightly doped drain region provide channel junctions. Forming a first asymmetrical IGFET includes forming a gate with first and second opposing sidewalls over a first active region, applying a first ion implantation to implant lightly doped source and drain regions into the first active region, applying a second ion implantation to convert substantially all of the lightly doped source region into a heavily doped source region without doping the lightly doped drain region, forming first and second spacers adjacent to the first and second sidewalls, respectively, and applying a third ion implantation to convert a portion of the heavily doped source region outside the first spacer into an ultra-heavily doped source region without doping a portion of the heavily doped source region beneath the first spacer, and to convert a portion of the lightly doped drain region outside the second spacer into a heavily doped drain region without doping a portion of the lightly doped drain region beneath the second spacer. A second asymmetrical IGFET is formed in a related manner. Advantageously, one or both IGFETs have low source-drain series resistance and reduce hot carrier effects.
公开/授权文献
- US5274769A System for transferring data between blocks 公开/授权日:1993-12-28
信息查询
IPC分类: