发明授权
US5694074A Semiconductor integrated circuit being able to generate sufficient boost
potential disregarding generation of noise
失效
半导体集成电路能够产生足够的升压电位，而不考虑噪声的产生
- 专利标题： Semiconductor integrated circuit being able to generate sufficient boost potential disregarding generation of noise
- 专利标题（中）： 半导体集成电路能够产生足够的升压电位，而不考虑噪声的产生
-
申请号： US580774申请日： 1995-12-29
-
公开(公告)号： US5694074A公开(公告)日： 1997-12-02
- 发明人: Osamu Kitade , Yutaka Ikeda
- 申请人： Osamu Kitade , Yutaka Ikeda
- 申请人地址： JPX Tokyo
- 专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX6-267292 19941031
- 主分类号： G11C5/14
- IPC分类号： G11C5/14 ; G11C7/10 ; H03K5/1252 ; H03K17/30
摘要：
A semiconductor integrated circuit comprises a NAND gate which constitutes a previous stage circuit, a reset circuit, a charging circuit, and a capacitor for generating a boost potential. A signal of a node A expressing data and a signal of a node B expressing permission of outputting data are not only input to the NAND gate, but also to the reset circuit, and the output of the reset circuit is not only input to the charging circuit but also to the NAND gate; therefore, the previous stage circuit and the reset circuit are interlinked with the output signals. In the result, even in a case where noise is generated in the node A, it is possible to obtain a sufficient boost potential generated in the capacitor.
公开/授权文献
信息查询
