发明授权
US5694364A Semiconductor integrated circuit device having a test mode for
reliability evaluation
失效
具有用于可靠性评估的测试模式的半导体集成电路器件
- 专利标题: Semiconductor integrated circuit device having a test mode for reliability evaluation
- 专利标题(中): 具有用于可靠性评估的测试模式的半导体集成电路器件
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申请号: US779186申请日: 1997-01-06
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公开(公告)号: US5694364A公开(公告)日: 1997-12-02
- 发明人: Fukashi Morishita , Masaki Tsukude , Kazutami Arimoto
- 申请人: Fukashi Morishita , Masaki Tsukude , Kazutami Arimoto
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX8-173838 19960703
- 主分类号: G11C11/407
- IPC分类号: G11C11/407 ; G11C5/14 ; G11C11/401 ; G11C29/00 ; G11C29/06 ; H01L21/822 ; H01L27/04 ; G11C7/00
摘要:
In the normal mode, a first voltage-down converter down-converts an external power supply voltage to provide a large, first internal power supply voltage to the peripheral circuitry via a first internal power supply voltage supplying line, and a second voltage-down converter down-converts the external power supply voltage to provide a smaller, second internal power supply voltage to a memory cell array via a second internal power supply voltage supplying line. This allows fast operation and reduction in power consumption. In conducting a burn-in test, an external power supply voltage supplying line is connected to the first and second internal power supply voltage supplying lines. Thus, the first and second internal power supply voltage supplying lines directly receive the external power supply voltage. This allows an effective burn-in test. In a burn-in test, the first and second voltage-down converters are inactivated.