发明授权
US5715195A Programmable memory verify "0" and verify "1" circuit and method
失效
可编程存储器验证“0”并验证“1”电路和方法
- 专利标题: Programmable memory verify "0" and verify "1" circuit and method
- 专利标题(中): 可编程存储器验证“0”并验证“1”电路和方法
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申请号: US683943申请日: 1996-07-19
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公开(公告)号: US5715195A公开(公告)日: 1998-02-03
- 发明人: Michael C. Smayling , Giulio Marotta , Giovanni Santin , Pietro Piersimoni , Cristina Lattaro
- 申请人: Michael C. Smayling , Giulio Marotta , Giovanni Santin , Pietro Piersimoni , Cristina Lattaro
- 申请人地址: TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: TX Dallas
- 主分类号: G11C16/34
- IPC分类号: G11C16/34 ; G11C11/34
摘要:
A method for automatically detecting and correcting the underprogramming of a memory cell 10 in a non-volatile, progrommable memory array 1, the array having a plurality of such cells, each such cell being programmable by a progromming step that stores charge therein and being erasable by an erasing step that removes charge therefrom, and each such cell being readable to determine whether such cell is in a progrommed state or in an erased state. First, charge is stored in a selected cell therein 74. Then the selected cell is read to determine whether the selected cell is programmed 78. If the step of reading does not determine such cell to be programmed 80, the steps of storing and reading are automatically repeated until either the step of sensing indicates a sufficiently programmed cell or, alternatively, until a predermined number of iterations of the steps has been performed 86.
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