发明授权
- 专利标题: Local ground and V.sub.CC connection in an SRAM cell
- 专利标题(中): SRAM单元中的本地接地和VCC连接
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申请号: US650286申请日: 1996-05-20
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公开(公告)号: US5741735A公开(公告)日: 1998-04-21
- 发明人: Michael P. Violette , Fernando Gonzalez
- 申请人: Michael P. Violette , Fernando Gonzalez
- 申请人地址: ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: ID Boise
- 主分类号: H01L21/74
- IPC分类号: H01L21/74 ; H01L21/768 ; H01L21/8244 ; H01L27/11 ; H01L21/336
摘要:
A retrograde well region, having a buried layer of high conductivity, is formed in a semiconductor substrate. A trench structure is selectively etched in the semiconductor substrate down to a region proximate to or within the buried layer. A conducting local interconnect material is formed within and proximate to the trench structure to electrically connect surface portions of the substrate to the buried layer. The buried layer is used to provide a voltage source to an integrated circuit. In one application, a P-type buried layer provides ground potential or V.sub.SS to a source region of an N-channel FET transistor. In a second application, an N-type buried layer provides supply potential or V.sub.CC to a source of a P-channel FET transistor.
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