发明授权
US5756365A Method of manufacturing MOS-type semiconductor device having electrode
structure capable of coping with short-channel effects
失效
具有能够应付短沟道效应的电极结构的MOS型半导体器件的制造方法
- 专利标题: Method of manufacturing MOS-type semiconductor device having electrode structure capable of coping with short-channel effects
- 专利标题(中): 具有能够应付短沟道效应的电极结构的MOS型半导体器件的制造方法
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申请号: US719334申请日: 1996-09-25
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公开(公告)号: US5756365A公开(公告)日: 1998-05-26
- 发明人: Masakazu Kakumu
- 申请人: Masakazu Kakumu
- 申请人地址: JPX Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX4-292774 19921030
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L21/336 ; H01L21/8238 ; H01L29/49 ; H01L29/78 ; H01L21/8234
摘要:
In a semiconductor device, an n.sup.+ -type polysilicon layer is formed on a substrate through a gate oxide layer. A p.sup.+ -type source or drain diffusion layer is formed on both sides of an impurity layer in the substrate. The n.sup.+ -type polysilicon layer is positioned over an intermediate portion of a channel formation layer, and has an oxide layer on an upper surface thereof. The n.sup.+ -type polysilicon layer has at its side portions a p.sup.+ -type polysilicon layer to make a gate electrode together with the n.sup.+ -type polysilicon layer. The gate electrode semiconductor layer is formed on the channel formation layer through the gate insulation layer in such a manner that in a portion contacting with the gate insulation layer, the nearer the portion approaches the impurity layers of the source and drain regions, the larger the work function of the portion becomes.
公开/授权文献
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