An acute matrix liquid crystal display panel including 1) a plurality of liquid crystal display elements distributed in a matrix of rows and columns; 2) means for supplying video signals and display element selection signals, including row and column conductors; and 3) a plurality of paired Ovonic threshold switches and resistive elements each serially coupled between the corresponding row or column conductor and the liquid crystal display element, the Ovonic threshold switches acting as display element selection devices and current isolation devices in which the Ovonic threshold switches having an off state resistance of at least 1.times.10.sup.9 ohms.