发明授权
US5761617A PLL synthesizer radio paging receiver capable of reducing an average
power consumption
失效
PLL合成器无线寻呼接收机能够降低平均功耗
- 专利标题: PLL synthesizer radio paging receiver capable of reducing an average power consumption
- 专利标题(中): PLL合成器无线寻呼接收机能够降低平均功耗
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申请号: US497723申请日: 1995-06-30
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公开(公告)号: US5761617A公开(公告)日: 1998-06-02
- 发明人: Kunitoshi Yonekura , Masahiro Matai
- 申请人: Kunitoshi Yonekura , Masahiro Matai
- 申请人地址: JPX Tokyo
- 专利权人: NEC Corporation
- 当前专利权人: NEC Corporation
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX6-171721 19940630
- 主分类号: H03L7/18
- IPC分类号: H03L7/18 ; H04B1/16 ; H04B7/26 ; H04W52/02 ; H04W88/02
摘要:
In a radio paging receiver which is for receiving call signals and which includes a control section (5) for making each of a PLL synthesizer section (4), a frequency converter section (2), and a demodulator section (3) carry out intermittent operation selectively in a short intermittent operation cycle synchronized with the call signals and in a long intermittent operation cycle longer than the short intermittent operation cycle, the PLL synthesizer has first and second loop filters (7 and 8) having first and second time constants, respectively. The second time constant is larger than the first time constant. One of the first and the second loop filters is selectively operable at a time. The control section further controls the first and the second loop filters so that the first loop filter is selectively operable when the contol section makes each of the PLL synthesizer section, the frequency converter section, and the demodulator section carry out the intermittent operation in the short intermittent operation cycle and that the second loop filter is selectively operable when the contol section makes each of the PLL synthesizer section, the frequency converter section, and the demodulator section carry out the intermittent operation in the long intermittent operation cycle.
公开/授权文献
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