发明授权
- 专利标题： Data cache prefetching under control of instruction cache
- 专利标题（中）： 数据缓存在指令缓存控制下预取
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申请号： US080438申请日： 1993-06-21
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公开(公告)号： US5784711A公开(公告)日： 1998-07-21
- 发明人: Chi-Hung Chi
- 申请人： Chi-Hung Chi
- 申请人地址： NY New York
- 专利权人： Philips Electronics North America Corporation
- 当前专利权人： Philips Electronics North America Corporation
- 当前专利权人地址： NY New York
- 主分类号： G06F9/30
- IPC分类号： G06F9/30 ; G06F9/38 ; G06F12/08 ; G06F9/32
摘要：
A data prefetching arrangement for use between a computer processor and a main memory. The addresses of data to be prefetched are calculated by decoding instructions which have been prefetched by decoding prefetched instructions, the instructions having been in accordance with an intelligent prefetching scheme. The processor registers have two sections for respective access by the processor and a prefetch controller. The instruction registers may also contain an additional counter field which indicates the number of instruction cycles which must be executed before the register may be reliably utilized for prefetching data.
公开/授权文献
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