Invention Grant
- Patent Title: Method and device for testing of an integrated circuit
- Patent Title (中): 用于集成电路测试的方法和装置
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Application No.: US624423Application Date: 1996-04-01
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Publication No.: US5786703APublication Date: 1998-07-28
- Inventor: Olli Piirainen
- Applicant: Olli Piirainen
- Applicant Address: FIX Espoo
- Assignee: Nokia Telecommunications Oy
- Current Assignee: Nokia Telecommunications Oy
- Current Assignee Address: FIX Espoo
- Priority: FIX934327 19931001
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3185 ; G06F11/22 ; H01L21/82
Abstract:
A method for testing an integrated circuit that has a testing portion for testing the circuit card and/or other circuits connected to the integrated circuit after the integrated circuit has been assembled onto the circuit card, inputs for controlling the testing portion, and test structures for testing the internal operations of the integrated circuit. To keep the number of the inputs to the circuit low, a test mode is defined for the testing portion, in which test mode one of the inputs of the testing portion is connected to the test structures for the internal operations of the integrated circuit, and when the internal operations of the integrated circuit are tested, the testing portion is set in the test mode, whereupon the internal test structures of the integrated circuit can be controlled from the input of the testing portion.
Public/Granted literature
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