发明授权
US5804488A Method of forming a tungsten silicide capacitor having a high breakdown
voltage
失效
形成具有高击穿电压的硅化钨电容器的方法
- 专利标题: Method of forming a tungsten silicide capacitor having a high breakdown voltage
- 专利标题(中): 形成具有高击穿电压的硅化钨电容器的方法
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申请号: US518702申请日: 1995-08-24
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公开(公告)号: US5804488A公开(公告)日: 1998-09-08
- 发明人: Chun-Yi Shih , Shun-Liang Hsu , Jyh-Kang Ting
- 申请人: Chun-Yi Shih , Shun-Liang Hsu , Jyh-Kang Ting
- 申请人地址: TWX Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TWX Hsin-Chu
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01L21/20 ; H01L21/8242
摘要:
A method for making a polycide-to-polysilicon capacitor having an improved breakdown voltage is described. A first layer of doped polysilicon is formed over a silicon substrate. A silicide layer is formed over the first layer of doped polysilicon. An oxide layer is formed over the silicide layer, and the silicide layer is then annealed. A second layer of doped polysilicon is formed over the oxide layer. The second layer of doped polysilicon is patterned to form a top plate of the capacitor. The oxide layer is removed except under the top plate of the capacitor, where it acts as a capacitor dielectric. The first layer of doped polysilicon and the silicide layer are patterned to form a polycide bottom plate of the capacitor.
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