发明授权
- 专利标题: Orthogonal function generating circuit and orthogonal function generating method
- 专利标题(中): 正交函数生成电路和正交函数生成方法
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申请号: US608611申请日: 1996-02-29
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公开(公告)号: US5805484A公开(公告)日: 1998-09-08
- 发明人: Yasunari Ikeda , Tamotsu Ikeda , Takahiro Okada
- 申请人: Yasunari Ikeda , Tamotsu Ikeda , Takahiro Okada
- 申请人地址: JPX Tokyo
- 专利权人: Sony Corporation
- 当前专利权人: Sony Corporation
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX7-050758 19950310
- 主分类号: G06F17/14
- IPC分类号: G06F17/14 ; G06F15/00
摘要:
In an orthogonal function generating circuit, orthogonal functions are generated with high precision by a small-scale circuit. The circuit uses an orthogonal transformation between time domain digital data and frequency domain digital data to obtain one of the time domain digital data and the frequency domain digital data from the other digital data. The circuit has a first data holder for holding first data and a second data holder for holding second data. A first multiplier multiplies the first data, and a second multiplier multiplies the first data by a second coefficient. A third multiplier multiplies the second data by a third coefficient, and afourth multiplier multiplies the second data by a fourth coefficient. An adder adds an output of the first multiplier to an output of the third multiplier, and outputs the result of addition so as to feed back the result of addition to the first data holder; and a subtracter subtracts an output of the second multiplier from an output of the fourth multiplier and for outputs the result of subtraction so as to feed back the result of subtraction to the second data holder.
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