A write control circuit performs write control of data in a write cycle using consistent parametric control according to a control signal and a write enable signal. A first buffer outputs a buffered control signal based on the control signal, and a second buffer outputs a buffered write enable signal based on the buffered control signal from the first buffer and the write enable signal. A write controller detects an input condition of the control signal and the write enable signal and outputs a delay control signal. A write control signal generator selects a delayed signal based on the delay control signal from the write controller and generates a write control signal, and an output unit outputs input data to data lines in accordance with the generated write control signal.