发明授权
US5821146A Method of fabricating FET or CMOS transistors using MeV implantation
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使用MeV植入制造FET或CMOS晶体管的方法
- 专利标题： Method of fabricating FET or CMOS transistors using MeV implantation
- 专利标题（中）： 使用MeV植入制造FET或CMOS晶体管的方法
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申请号： US479880申请日： 1995-06-07
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公开(公告)号： US5821146A公开(公告)日： 1998-10-13
- 发明人: Kuang-Yeh Chang , Yowjuang W. Liu , Mark I. Gardner , Fred Hause
- 申请人： Kuang-Yeh Chang , Yowjuang W. Liu , Mark I. Gardner , Fred Hause
- 申请人地址： CA Sunnyvale
- 专利权人： Advanced Micro Devices, Inc.
- 当前专利权人： Advanced Micro Devices, Inc.
- 当前专利权人地址： CA Sunnyvale
- 主分类号： H01L21/266
- IPC分类号： H01L21/266 ; H01L21/8238 ; H01L27/092 ; H01L21/336
摘要：
A method of manufacturing a transistor having LDD regions in which the source and drain regions are formed by implanting ions through a photoresist layer at an energy of 1 MeV and greater and the LDD regions are formed by low energy ion implantation after the oxide layer is removed from the active region and the gate. In a second embodiment, the source and drain regions are formed without a photoresist layer by ion implantation and the LDD regions are formed by low energy ion implantation after the oxide layer is removed from the active region and the gate.
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