Key signal processing apparatus for video signal processing
摘要:
A key signal processing apparatus for video signal processing including a signal delay circuit for successively delaying by 1 clock units a key input signal, used for applying a special effect to a video signal, and outputting the delayed key signal; a signal selection circuit for receiving the key input signal and a plurality of delayed key signals output from the signal delay circuit and selecting based on a selection control signal two pairs of signals in predetermined relationships of delay; a first signal interpolation circuit for performing signal interpolation on the first pair output from the signal selection circuit using a first coefficient; a second signal interpolation circuit for performing signal interpolation on the second pair output from the signal selection circuit using a second coefficient; and a signal synthesization circuit for combining a signal from the output of the first signal interpolation circuit and the output of the second signal interpolation circuit and outputting it as a key signal for video signal processing.
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