发明授权
- 专利标题: Non-volatile semiconductor memory and method of manufacturing the same
- 专利标题(中): 非易失性半导体存储器及其制造方法
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申请号: US949819申请日: 1997-10-14
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公开(公告)号: US5824583A公开(公告)日: 1998-10-20
- 发明人: Masamichi Asano , Hiroshi Iwahashi , Ryouhei Kirisawa , Ryozo Nakayama , Satoshi Inoue , Riichiro Shirota , Tetsuo Endoh , Fujio Masuoka
- 申请人: Masamichi Asano , Hiroshi Iwahashi , Ryouhei Kirisawa , Ryozo Nakayama , Satoshi Inoue , Riichiro Shirota , Tetsuo Endoh , Fujio Masuoka
- 申请人地址: JPX Kawasaki JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba,Toshiba Micro-Electronics Corporation
- 当前专利权人: Kabushiki Kaisha Toshiba,Toshiba Micro-Electronics Corporation
- 当前专利权人地址: JPX Kawasaki JPX Kawasaki
- 优先权: JPX63-265370 19881021; JPX1-224006 19890819
- 主分类号: G11C16/04
- IPC分类号: G11C16/04 ; H01L21/8247 ; H01L27/115 ; H01L29/788
摘要:
The present invention relates to a non-volatile semiconductor memory having non-volatile memory cells capable of electrically erasing and writing data. Each memory cell has a floating gate formed on the surface of the semiconductor substrate above the channel region, and a control gate. The floating gate partially covers the channel region. Each memory cell is thereby constructed of a parallel connection of a floating gate transistor and an enhancement type transistor. The floating gate transistor is displaced in one of the widthwise directions of the channel region, or partially covers only the central portion of the channel region in the widthwise direction thereof. A plurality of memory cells are connected in series to constitute a basic block. Adjacent basic blocks are separated by an enhancement type MOS transistor. In this memory, a memory cell (floating gate) and an enhancement type MOS transistor (gate) are formed in self alignment with each other using the same mask. In addition, in this memory, a control gate and a floating gate are formed in self alignment with each other using the same mask.
公开/授权文献
- US4192866A Anorectal medication 公开/授权日:1980-03-11
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