The present invention relates to a method of fabricating a CMOS transistor which can further reduce the size of a chip since it is not necessary to consider the metal contact process margin since a gate electrode of a PMOS transistor and a gate electrode of an NMOS transistor are directly connected with a polysilicon wiring during a process of forming the gate electrodes, which can prevent the formation of a parasitic transistor by forming a cell space region in an active region below the polysilicon wiring.