发明授权
US5875123A Carry-select adder with pre-counting of leading zero digits 失效
进位选择加法器,前置零位预计数

Carry-select adder with pre-counting of leading zero digits
摘要:
A method and apparatus for the determination of leading zero digits of a sum is presented herein. The technique incorporates the parallel determination of partial sums of single digits accounting for the possibility of carries and on the basis thereof the pre-determination of potential zero digits or potential leading zero digits. Upon the establishment of a correct partial sum, the potential zero digits are selected and evaluated thereby determining the leading zero digits. The invention may be implemented in an adder in parallel or via a hierarchical structure. The parallelism permits time-savings in the determination of a normalized sum. The invention is preferably incorporated into adders, floating point computing units and/or data processing units.
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