发明授权
- 专利标题: Method and circuit for the programming and erasure of a memory
- 专利标题(中): 用于编程和擦除存储器的方法和电路
-
申请号: US703811申请日: 1996-08-27
-
公开(公告)号: US5883833A公开(公告)日: 1999-03-16
- 发明人: David Naura , Jean Devin
- 申请人: David Naura , Jean Devin
- 专利权人: STMicroelectronics SA
- 当前专利权人: STMicroelectronics SA
- 优先权: FRX9510577 19950905
- 主分类号: G11C16/12
- IPC分类号: G11C16/12 ; G11C16/14 ; G11C11/34
摘要:
A method and apparatus for the programming and erasure of a memory cell made out of floating-gate transistors and to the circuit pertaining thereto is described. It can be applied especially to non-volatile electrically erasable and programmable memories, for example EEPROMs and flash EPROMs. A programming voltage or erasure voltage including a voltage shift equal in value to a reference voltage is produced, followed by a voltage ramp comprising a rising phase followed possibly by voltage plateau, this voltage ramp being shifted in voltage by the value of the reference voltage and being followed, in turn, by a voltage drop. The value of the voltage shift is fixed at an intermediate value that is lower than the value of a so-called tunnel voltage of the memory cell but greater than the supply voltage.
公开/授权文献
- US5137572A Emulsifier and method of using in mixing grade emulsions 公开/授权日:1992-08-11
信息查询