发明授权
US5892699A Method and apparatus for optimizing dependent operand flow within a multiplier using recoding logic 失效
用于使用重新编码逻辑优化乘数内的相关操作数流的方法和装置

Method and apparatus for optimizing dependent operand flow within a
multiplier using recoding logic
摘要:
A method and apparatus for eliminating the setup time typically required for Booth recoding logic is provided. Interlock circuitry detects when a second multiply instruction specifies that the product of a previous multiply instruction is to be used as the multiplier input to the Booth recoding logic. The interlock logic controls mux inputs to both the multiplier path, and the multiplicand path. When the interlock logic detects such a multiplier dependency, the product of the previous multiply instruction is provided to the multiplicand path, and the multiplicand is provided to the multiplier path. The multiplier for the second multiply instruction can therefore be provided to the Booth recoding logic, before the product of the previous multiply instruction is available. The Booth recoding logic is therefore setup, prior to execution of the second multiply instruction.
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