发明授权
- 专利标题: Memory address translations for programs code execution/relocation
- 专利标题(中): 程序代码执行/重定位的内存地址转换
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申请号: US724610申请日: 1996-09-30
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公开(公告)号: US5909702A公开(公告)日: 1999-06-01
- 发明人: Marc Jalfon , David Regenold , Franco Ricci , Ramprasad Satagopan
- 申请人: Marc Jalfon , David Regenold , Franco Ricci , Ramprasad Satagopan
- 申请人地址: CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: CA Santa Clara
- 主分类号: G06F12/02
- IPC分类号: G06F12/02 ; G06F13/00
摘要:
A multiprocessor data processing system includes a private data bus and a private program bus coupled to each of the processors. Coupled between the private data buses is a plurality of memory banks, each of which can be dynamically switched between the processors to move blocks of data without physically transferring the data from one bank to another. Likewise, a plurality of memory banks is coupled between the program buses. These memory banks are loaded with pages of program instructions from external memory over a shared bus. Any one of the pages can be coupled to either of the processors on its respective private program bus. When the pages are coupled to the shared bus, they appear as a contiguous address space. When a page is coupled to one of the private program buses, the addressing mode is changed so that the page is mapped to a common address space. This permits the program code to be loaded into any available page, and the processors can execute the code regardless of where it has been loaded, thereby permitting easy relocatability.
公开/授权文献
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