The preferred embodiment of the present invention provides an apparatus and method to facilitate the testing of semiconductor devices packaged in surface mount modules (such as ball grid array modules and cylinder grid array modules) while the module is connected to a system board. The preferred embodiment provides an interposer mechanism that includes a top array of interposer landing pads and a bottom array of interposer landing pads. The bottom array of interposer landing pads are connected to the top array of interposer landing pads. The preferred embodiment also provides a module test card mechanism. The module test card mechanism includes a plurality of landing pads arranged to receive the surface mount module. The plurality of landing pads are connected to a plurality of test pins, and a plurality of landing pads underneath the module test card mechanism. The surface mount module can be coupled the system board through the module test card mechanism and the interposer mechanism with the plurality of test pins providing access to the semiconductor device for testing.