发明授权
- 专利标题： Method of manufacturing serrated gate-type or joined structure
- 专利标题（中）： 制造锯齿型门式或接合结构的方法
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申请号： US140760申请日： 1998-08-26
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公开(公告)号： US5956577A公开(公告)日： 1999-09-21
- 发明人: Yoshio Terasawa
- 申请人： Yoshio Terasawa
- 申请人地址： JPX
- 专利权人： NGK Insulators, Ltd.
- 当前专利权人： NGK Insulators, Ltd.
- 当前专利权人地址： JPX
- 优先权： JPX7-20416 19950208
- 主分类号： H01L21/18
- IPC分类号： H01L21/18 ; H01L21/329 ; H01L21/331 ; H01L21/332 ; H01L21/336 ; H01L29/423 ; H01L29/739 ; H01L29/744 ; H01L29/78
摘要：
A method of manufacturing a joined-type semiconductor device having a gate structure. The semiconductor device includes a first and second semiconductor substrates each having a substrate body, and a first and a second main surfaces which are opposite to each other. A gate structure is formed in the first main surface of the first substrate. A highly-doped semiconductor layer is formed in the first main surface of the second substrate and has an impurity-concentration which is higher than that of the substrate body of the second substrate. The first main surfaces of the two substrates are joined with each other, by subjecting the two substrates to a heat treatment so that impurities in the highly-doped semiconductor layer of the second substrate are driven into the surface region of the first substrate, and a diffusion layer is thereby formed in the first main surface of the first substrate.
公开/授权文献
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