Invention Grant
- Patent Title: Fast Nor-Nor PLA operating from a single-phase clock
- Patent Title (中): 从单相时钟开始运行的快速Nor-Nor PLA
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Application No.: US581737Application Date: 1995-12-29
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Publication No.: US5959465APublication Date: 1999-09-28
- Inventor: Robert Beat
- Applicant: Robert Beat
- Applicant Address: GBX Almondsbury
- Assignee: STMicroelectronics Ltd.
- Current Assignee: STMicroelectronics Ltd.
- Current Assignee Address: GBX Almondsbury
- Priority: GBX9426335 19941229
- Main IPC: H03K19/177
- IPC: H03K19/177
Abstract:
A method is provided for operating a programmable logic array in an integrated circuit. Each stage of the circuit is enabled only during the time necessary for that stage to propagate an incoming signal. Enable signals are generated for the stages of the circuit, using a dummy circuit which replicates elements of the circuit in dimension, orientation and connectivity. These elements provide a delay path, such that an input signal applied coincidentally to the programmable logic array circuit and the dummy circuit produces outputs of the dummy circuit which define times for applying and removing the enable signals from stages of the programmable logic array circuit.
Public/Granted literature
- US5060363A Apparatus and method for forming holes in thermoplastic webbing Public/Granted day:1991-10-29
Information query
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