发明授权
US5970344A Method of manufacturing semiconductor device having gate electrodes
formed in trench structure before formation of source layers
有权
在形成源层之前制造具有在沟槽结构中形成的栅电极的半导体器件的方法
- 专利标题： Method of manufacturing semiconductor device having gate electrodes formed in trench structure before formation of source layers
- 专利标题（中）： 在形成源层之前制造具有在沟槽结构中形成的栅电极的半导体器件的方法
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申请号： US138617申请日： 1998-08-24
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公开(公告)号： US5970344A公开(公告)日： 1999-10-19
- 发明人: Hirotoshi Kubo , Eiichiroh Kuwako , Masanao Kitagawa , Hiroaki Saito
- 申请人： Hirotoshi Kubo , Eiichiroh Kuwako , Masanao Kitagawa , Hiroaki Saito
- 申请人地址： JPX Osaka
- 专利权人： Sanyo Electric Co., Ltd.
- 当前专利权人： Sanyo Electric Co., Ltd.
- 当前专利权人地址： JPX Osaka
- 优先权： JPX9-229511 19970826
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L29/08 ; H01L29/417 ; H01L29/78 ; H01L21/302
摘要：
A channel layer is formed in a surface of a semiconductor substrate, and a plurality of trenches are formed in the surface of the semiconductor substrate, the trenches being deeper than the channel layer. Then, gate electrodes are formed in the trenches, respectively, after which body layers are formed between the trenches and source layers are formed adjacent to the trenches.
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