发明授权
US5973959A Circuit and method of reading cells of an analog memory array, in
particular of the flash type
失效
读取模拟存储器阵列的单元的电路和方法,特别是闪存类型
- 专利标题: Circuit and method of reading cells of an analog memory array, in particular of the flash type
- 专利标题(中): 读取模拟存储器阵列的单元的电路和方法,特别是闪存类型
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申请号: US121024申请日: 1998-07-22
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公开(公告)号: US5973959A公开(公告)日: 1999-10-26
- 发明人: Danilo Gerna , Roberto Canegallo , Ernestina Chioffi , Marco Pasotti , Pier Luigi Rolandi
- 申请人: Danilo Gerna , Roberto Canegallo , Ernestina Chioffi , Marco Pasotti , Pier Luigi Rolandi
- 申请人地址: ITX Agrate Brianza
- 专利权人: STMicroelectronics S.r.l.
- 当前专利权人: STMicroelectronics S.r.l.
- 当前专利权人地址: ITX Agrate Brianza
- 主分类号: G11C11/56
- IPC分类号: G11C11/56 ; G11C16/26 ; G11C27/00 ; G11C16/04 ; G11C16/06
摘要:
A reading circuit comprises a current mirror circuit connected, at a first and a second output node, to the drain terminals of an array cell and of a reference cell; a comparator whose inputs are connected to the output nodes of the current mirror circuit; a ramp generator having an enabling input connected to the output of the comparator and an output connected to the control terminal of the reference cell. Biasing the gate terminal of the array cell to a constant voltage, when the currents flowing in the array cell and in the reference cell are equal, the value assumed by the ramp voltage is proportional to the threshold value of the array cell; at that time the comparator is triggered and discontinues the ramp increase, supplying as output the desired threshold value.
公开/授权文献
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