发明授权
- 专利标题: Fabrication process of a semiconductor device having an interconnection structure
- 专利标题(中): 具有互连结构的半导体器件的制造工艺
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申请号: US685177申请日: 1996-07-18
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公开(公告)号: US5976971A公开(公告)日: 1999-11-02
- 发明人: Shigeru Kinpara , Katsunari Hanaoka , Ikue Kawashima , Kazunori Ito
- 申请人: Shigeru Kinpara , Katsunari Hanaoka , Ikue Kawashima , Kazunori Ito
- 申请人地址: JPX Tokyo
- 专利权人: Ricoh Company, Ltd.
- 当前专利权人: Ricoh Company, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX7-206562 19950719; JPX8-038763 19960131
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L23/522 ; H01L21/44
摘要:
A method of fabricating a semiconductor device includes the steps of forming a contact hole in an insulator layer, filling the contact hole by a conductor material, removing the conductor material from the upper major surface of the insulator layer to form a conductive plug such that the conductive plug fills the contact hole, applying an anisotropic etching process upon the insulator layer, such that the anisotropic etching process acts substantially vertically and selectively to the insulator layer, with an etching rate substantially larger than an etching rate for the conducive plug.
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