发明授权
- 专利标题: Hardware-managed programmable congruence class caching mechanism
- 专利标题(中): 硬件管理的可编程一致级缓存机制
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申请号: US839560申请日: 1997-04-14
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公开(公告)号: US5983322A公开(公告)日: 1999-11-09
- 发明人: Ravi Kumar Arimilli , Leo James Clark , John Steven Dodson , Jerry Don Lewis
- 申请人: Ravi Kumar Arimilli , Leo James Clark , John Steven Dodson , Jerry Don Lewis
- 申请人地址: NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: NY Armonk
- 主分类号: G06F12/08
- IPC分类号: G06F12/08
摘要:
A method of providing programmable congruence classes in a cache used by a processor of a computer system is disclosed. A logic unit is connected to the cache for modifying original addresses of memory blocks in a memory device to produce encoded addresses. A plurality of cache congruence classes are then defined using a mapping function which operates on the encoded addresses, such that the logic unit may be used to arbitrarily assign a given one of the original addresses to a particular one of the cache congruence classes. The logic unit can modify the original addresses by setting a plurality of programmable fields. The logic unit also can collect information on cache misses, and modify the original addresses in response to the cache miss information. In this manner, a procedure running on the processor and allocating memory blocks to the cache such that the original addresses, if applied to the mapping function, would result in striding of the cache, runs more efficiently by using the encoded addresses to result in less striding of the cache.
公开/授权文献
- US5217043A Control valve 公开/授权日:1993-06-08
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