发明授权
- 专利标题: Reduced-capacitance component mounting pads and capacitance-reduction methods for high frequency multi-layer printed circuit boards
- 专利标题(中): 用于高频多层印刷电路板的减少电容元件安装垫和电容降低方法
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申请号: US967489申请日: 1997-11-11
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公开(公告)号: US6020562A公开(公告)日: 2000-02-01
- 发明人: Lawrence M. Burns , Nicholas Mitchell , Theresa Bradshaw , Chong Woo
- 申请人: Lawrence M. Burns , Nicholas Mitchell , Theresa Bradshaw , Chong Woo
- 申请人地址: CA Santa Clara
- 专利权人: 3Com Corporation
- 当前专利权人: 3Com Corporation
- 当前专利权人地址: CA Santa Clara
- 主分类号: H05K1/02
- IPC分类号: H05K1/02 ; H05K1/11 ; H05K3/34 ; H01R9/09 ; H01R23/68
摘要:
Component mounting pads for multi-layer printed circuit boards encompass a smaller area than conventional pads, reducing parasitic capacitance between the pads and a ground plane layer. A number of such pads are arranged to accommodate standard surface-mount component sizes and packages. Further capacitance reductions are achieved by implementing mesh areas or apertures in the board's ground plane opposite the reduced-capacitance pads.
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