发明授权
- 专利标题: Fault-tolerant computer system
- 专利标题(中): 容错计算机系统
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申请号: US682956申请日: 1996-07-18
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公开(公告)号: US6032265A公开(公告)日: 2000-02-29
- 发明人: Hiroshi Oguro , Shinichiro Yamaguchi , Yoshihiro Miyazaki , Soichi Takaya , Masataka Hiramatsu , Nobuo Akeura
- 申请人: Hiroshi Oguro , Shinichiro Yamaguchi , Yoshihiro Miyazaki , Soichi Takaya , Masataka Hiramatsu , Nobuo Akeura
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX7-181222 19950718
- 主分类号: G06F11/00
- IPC分类号: G06F11/00 ; G06F11/16 ; G06F11/20 ; G06F11/30 ; G06F13/00 ; G06F15/16
摘要:
A fault-tolerant computer system, which prevents an I/O fault from reaching the CPU block while using an alternative I/O block to continue processing, employs common general-purpose processors with a minimum of specialized peripheral circuits. Dual system bus adapters are provided not in the fast-operating CPU portion requiring sophisticated packaging technology, but in the low-speed interface between the CPUs and the I/O bus adapters. This allows the CPUs and I/O bus adapters to be shared by ordinary data processors, workstations, or personal computers while implementing a fault-tolerant computer system. If a one-shot hardware fault occurs in a CPU or in an I/O bus adapter, the faulty component is disconnected from the system so that the system will operate uninterruptedly.
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