发明授权
US6044036A Buffer circuit, memory device, and integrated circuit for receiving
digital signals
失效
缓冲电路，存储器件和用于接收数字信号的集成电路
- 专利标题： Buffer circuit, memory device, and integrated circuit for receiving digital signals
- 专利标题（中）： 缓冲电路，存储器件和用于接收数字信号的集成电路
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申请号： US78159申请日： 1998-05-13
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公开(公告)号： US6044036A公开(公告)日： 2000-03-28
- 发明人: Stephen T. Flannagan , William R. Weier
- 申请人： Stephen T. Flannagan , William R. Weier
- 申请人地址： IL Schaumburg
- 专利权人： Motorola, Inc.
- 当前专利权人： Motorola, Inc.
- 当前专利权人地址： IL Schaumburg
- 主分类号： G11C7/10
- IPC分类号： G11C7/10 ; G11C8/06 ; H03K17/041 ; G11C8/00
摘要：
A buffer circuit (60) that includes a current source (74) having an output, the current source to provide a substantially constant current, a first differential amplifier (62), and a second differential amplifier (66). The current from current source 74 is shared by the first (62) and second (64) differential amplifiers.
公开/授权文献
- USD415746S Computer pointing device 公开/授权日：1999-10-26
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