发明授权
- 专利标题： Semiconductor device manufacturing method including ashing process
- 专利标题（中）： 包括灰化处理的半导体器件制造方法
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申请号： US961242申请日： 1997-10-30
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公开(公告)号： US6044850A公开(公告)日： 2000-04-04
- 发明人: Soichiro Ozawa , Satoru Mihara , Kunihiko Nagase , Masaaki Aoyama , Naoki Nishida
- 申请人： Soichiro Ozawa , Satoru Mihara , Kunihiko Nagase , Masaaki Aoyama , Naoki Nishida
- 申请人地址： JPX Kawasaki
- 专利权人： Fujitsu Limited
- 当前专利权人： Fujitsu Limited
- 当前专利权人地址： JPX Kawasaki
- 优先权： JPX8-292095 19961101; JPX9-243117 19970908
- 主分类号： C23F4/00
- IPC分类号： C23F4/00 ; H01L21/02 ; H01L21/027 ; H01L21/302 ; H01L21/3065 ; H01L21/3205 ; H01L21/3213 ; H01L23/52 ; B08B6/00
摘要：
Ashing process of a resist pattern used in a semiconductor device manufacturing method is conducted by exposing the resist, the wirings, and their peripheral regions to a first atmosphere which includes a first product obtained by plasmanizing a gas containing water at a rate of more than 30 flow rate %, and placing the resist in a second atmosphere which includes a second product obtained by plasmanizing an oxygen mixed gas which contains an oxygen gas as a principal component before or after or before and after the exposing step.
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