发明授权
- 专利标题: Gate structure of semiconductor memory
- 专利标题(中): 半导体存储器的门结构
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申请号: US55946申请日: 1998-04-07
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公开(公告)号: US6046484A公开(公告)日: 2000-04-04
- 发明人: Yasunobu Kodaira
- 申请人: Yasunobu Kodaira
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX9-103982 19970408
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/8244 ; H01L27/105 ; H01L27/11 ; H01L29/78 ; H01L29/76 ; H01L27/088 ; H01L29/94
摘要:
An improved semiconductor memory device comprising memory cell areas including driving transistors having capacitors with increased capacitance. The driving transistors comprise a gate insulating film formed on a semiconductor substrate, a lower gate electrode formed on the gate insulating film, an upper gate electrode having a size smaller than the lower gate electrode and formed on the lower gate electrode, and an insulating film formed on the lower gate electrode so as to contact with a side wall of the upper gate electrode.
公开/授权文献
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