发明授权
- 专利标题: Output circuit of semiconductor memory device
- 专利标题(中): 半导体存储器件的输出电路
-
申请号: US140329申请日: 1998-08-26
-
公开(公告)号: US6052317A公开(公告)日: 2000-04-18
- 发明人: Naoki Miura
- 申请人: Naoki Miura
- 申请人地址: JPX Tokyo
- 专利权人: Oki Electric Industry Co., Ltd.
- 当前专利权人: Oki Electric Industry Co., Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX9-258196 19970924
- 主分类号: G11C11/417
- IPC分类号: G11C11/417 ; G11C7/06 ; G11C7/10 ; G11C11/409 ; H03K19/0175 ; G11C7/00
摘要:
An output circuit of a semiconductor memory device is made up of a level recognition circuit which outputs a feedback signal by comparing an output node and a second reference voltage, and a P-channel MOS transistor and an N-channel MOS transistor which complimentary turn on and off in response to the feedback signal. As a result, when a charge of the output node is not sufficient, the output node is charged by setting a voltage of a power supply node to a power supply voltage Vcc. Then, when the output node is sufficiently charged, the N-channel MOS transistor turns on, and as a result the voltage of the power supply node is set to a first reference voltage. Accordingly, the output circuit of the semiconductor memory device achieve an increased operation speed and decreased voltage level amplitude at the output node.
公开/授权文献
信息查询
IPC分类: