A sense/output circuit is designed for use with a memory device, such as an SDRAM (Synchronized Dynamic Random-Access Memory) device, which is capable of switching off some power-consuming circuit components immediately after the requested data output is completed. This feature can help reduce the power consumption by the overall memory system, making the use of the SDRAM device more cost-effective. Moreover, the reduction of power consumption can be achieved without concerning process parameters, component parameters, and temperature variations. As a result, the delay margin can be reduced compared to the prior art, which also contribute to the reduction of power consumption.