An apparatus, system and method permitting a variety of reset procedures and corresponding reset states. A device reset control register is provided for each I/O device adapter in single function or multifunction devices. The device reset control registers permit a greater degree of control over single function devices, multifunction device as a whole and individual device functions within a multifunction device. A device immediate status register synchronizes the various reset procedures. A logical power on reset procedure, a directed unit reset procedure and a directed interface reset procedure utilize the greater degree of control that the device reset control registers provide to force the I/O device adapter, single function device or multifunction device into a corresponding logical power on reset state, a directed unit reset state or a directed interface reset state. Each of these reset states is well-defined and has the advantage of predictable behavior during and after execution of the corresponding reset procedure. A built-in self-test procedure is also defined that sequentially examines each function associated within a multifunction device connected to the local bus to coordinate the initiation, execution and completion of built in self-tests.